(1) Field of the Invention
This invention relates to an integrated process allowing the fabrication of logic devices, and memory devices, to be accomplished on a single semiconductor chip.
(2) Description of Prior Art
Advanced semiconductor chips, now being manufactured in industry, are composed of logic or memory devices. Logic devices are used to process information or data, while memory devices are used for data storage. These two types of devices can be found in almost all computers, however they are usually found on specific chips, reserved for either logic or memory applications. In systems in which logic and memory devices are packaged separately, data signals between the two may have to pass through several levels of packaging, which can result in undesirable propagation delays. In addition the manufacturing costs for fabricating wafers producing only logic chips, and wafers with only memory chips, are greater than if both logic and memory applications can be incorporated on the same chip. Therefore for performance and cost reasons the semiconductor industry has been motivated to produce a semiconductor chip with both the desired logic and memory requirements.
This invention will describe a novel fabrication process that simultaneously allows, memory devices to be fabricated with a self-aligned contact, (SAC), structure, and logic devices, to be fabricated with salicide, (Self-ALigned metal silICIDE). The SAC feature, used in the MOS memory device, results in a decrease in the area needed for metal, or polysilicon contact to source and drain regions, thus allowing miniaturization of MOS memory devices to be realized. The use of low resistance Salicide layers, result in performance increases for MOS logic devices. Prior art, such as Yoo, in U.S. Pat No. 5,573,980, describes a process for forming a salicided, SAC structure, for a static random access memory device, however that prior art does teach the process described in this invention, that is a process used to integrate a salicided, logic device, and a non-salicided, memory device, featuring a SAC structure.